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<html>
  <head>
    <title>Intel Open source Graphics Programmer's Reference Manuals</title>
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  <body>
    <h1>Programmer Reference Manuals for Intel graphics</a></h1>
    <p>
      This is a mirror of the PDFs at
      <a href="https://01.org/linuxgraphics/documentation">Intel's official site</a>.
      The mirror provides bulk download of the PDFs via git;
      and better organization for old chipsets.
    </p>
    <h3>Links</h3>
    <ul>
      <li>canonical uri: <a href="http://kiwitree.net/~chadv/intel-gfx-docs/prm" class="code">http://kiwitree.net/~chadv/intel-gfx-docs/prm</a></li>
      <li>git clone: <a href="git://git.kiwitree.net/~chadv/intel-gfx-docs" class="code">git://git.kiwitree.net/~chadv/intel-gfx-docs</a></li>
      <li>git clone: <a href="http://git.kiwitree.net/~chadv/cgit/intel-gfx-docs" class="code">http://git.kiwitree.net/~chadv/cgit/intel-gfx-docs</a></li>
      <li>git webbrowse: <a href="http://git.kiwitree.net/cgit/~chadv/intel-gfx-docs" class="code">http://git.kiwitree.net/cgit/~chadv/intel-gfx-docs</a></li>
      <li>Intel's official site: <a href="https://01.org/linuxgraphics/documentation" class="code">https://01.org/linuxgraphics/documentation</li>
    </ul>
    <h3>Gen11: Ice Lake</h3>
    <ul>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol01-preface_1.pdf">Volume 1: Preface</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol02a-commandreference-instructions_2.pdf">Volume 2a: Command Reference: Instructions (Command Opcodes)</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol02b-commandreference-enumerations_0.pdf">Volume 2b: Command Reference: Enumerations</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol02c-commandreference-registers-part1_0.pdf">Volume 2c: Command Reference: Registers, Part 1 – Registers A through L</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol02c-commandreference-registers-part2_0.pdf">Volume 2c: Command Reference: Registers, Part 2 – Registers M through Z</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol02d-commandreference-structures_0.pdf">Volume 2d: Command Reference: Structures</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol03-gpu_overview_0.pdf">Volume 3: GPU Overview</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol04-configurations_0.pdf">Volume 4: Configurations</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol05-memory_data_formats_0.pdf">Volume 5: Memory Data Formats</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol06-memory_views_0.pdf">Volume 6: Memory Views</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol07-memory_cache_0.pdf">Volume 7: Memory Cache</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol08-command_stream_programming_0.pdf">Volume 8: Command Stream Programming</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol09-renderengine_0.pdf">Volume 9: Render Engine</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol10-copyengine_0.pdf">Volume 10: Copy Engine</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol11-mediaengines_0.pdf">Volume 11: Media Engines</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol12-displayengine_0.pdf">Volume 12: Display Engine</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol13-hwsw_system_interface_0.pdf">Volume 13: SW/HW System Interface</a></li>
      <li><a href="gen11.0-icl/intel-gfx-prm-osrc-icllp-vol14-workarounds_0.pdf">Volume 14: Workarounds</a></li>
    </ul>
    <h3>Gen9.5: Whiskey Lake</h3>
    <ul>
      <li><a href="gen9.5-whl/intel-gfx-prm-osrc-whl-vol01-configurations.pdf">Volume 1: Configurations</a></li>
    </ul>
    <h3>Gen9.5: Amber Lake</h3>
    <ul>
      <li><a href="gen9.5-aml/intel-gfx-prm-osrc-aml-vol01-configurations.pdf">Volume 1: Configurations</a></li>
    </ul>
    <h3>Gen9.5: Coffee Lake</h3>
    <ul>
      <li><a href="gen9.5-cfl/intel-gfx-prm-osrc-cfl-vol01-configurations.pdf">Volume 1: Configurations</a></li>
    </ul>
    <h3>Gen9.5: Kaby Lake</h3>
    <ul>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol01-preface.pdf">Volume 1: Preface</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol02a-commandreference-instructions.pdf">Volume 2a: Command Reference: Instructions (Command Opcodes)</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol02b-commandreference-enumerations.pdf">Volume 2b: Command Reference: Enumerations</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol02c-commandreference-registers-part1.pdf">Volume 2c: Command Reference: Registers, Part 1 – Registers A through L</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol02c-commandreference-registers-part2_0.pdf">Volume 2c: Command Reference: Registers, Part 2 – Registers M through Z</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol02d-commandreference-structures.pdf">Volume 2d: Command Reference: Structures</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol03-gpu_overview.pdf">Volume 3: GPU Overview</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol04-configurations.pdf">Volume 4: Configurations</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol05-memory_views.pdf">Volume 5: Memory Views</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol06-command_stream_programming.pdf">Volume 6: Command Stream Programming</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol07-3d_media_gpgpu.pdf">Volume 7: 3D-Media-GPGPU</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol08-media_vdbox.pdf">Volume 8: Media VDBOX</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol09-media_vebox.pdf">Volume 9: Media VEBOX</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol10-hevc.pdf">Volume 10: HEVC</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol11-blitter.pdf">Volume 11: Blitter</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol12-display.pdf">Volume 12: Display</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol13-mmio.pdf">Volume 13: MMIO</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol14-observability.pdf">Volume 14: Observability</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol15-sfc.pdf">Volume 15: SFC</a></li>
      <li><a href="gen9.5-kbl/intel-gfx-prm-osrc-kbl-vol16-workarounds.pdf">Volume 16: Workarounds</a></li>
    </ul>
    <h3>Gen9: Broxton / Apollo Lake</h3>
    <ul>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol01-preface.pdf">Volume 1: Preface</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol02a-commandreference-instructions.pdf">Volume 2a: Command Reference: Instructions (Command Opcodes)</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol02b-commandreference-registers.pdf">Volume 2b: Command Reference: Registers</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol02c-commandreference-structures.pdf">Volume 2c: Command Reference: Structures</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol03-configurations.pdf">Volume 3: Configurations</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol04-memory_views.pdf">Volume 4: Memory Views</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol05-command_stream_programming.pdf">Volume 5: Command Stream Programming</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol06-3d_media_gpgpu.pdf">Volume 6: 3D-Media-GPGPU</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol07-display.pdf">Volume 7: Display</a></li>
      <li><a href="gen9.0-bxt-apl/intel-gfx-prm-osrc-bxt-vol08-workarounds.pdf">Volume 8: Workarounds</a></li>
    </ul>
    <h3>Gen9: Skylake</h3>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol01-preface.pdf">Volume 1: Preface</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions.pdf">Volume 2a: Command Reference-Instructions (Command Opcodes)</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol02b-commandreference-enumerations.pdf">Volume 2b: Command Reference-Enumerations</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part1.pdf">Volume 2c: Command Reference-Registers Part 1 - Registers A through L</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part2.pdf">Volume 2c: Command Reference-Registers Part 2 - Registers M through Z</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol02d-commandreference-structures.pdf">Volume 2d: Command Reference-Structures</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol03-gpu_overview.pdf">Volume 3: GPU Overview</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol04-configurations.pdf">Volume 4: Configurations</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol05-memory_views.pdf">Volume 5: Memory Views</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol06-command_stream_programming.pdf">Volume 6: Command Stream Programming</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol07-3d_media_gpgpu.pdf">Volume 7: 3D-Media-GPGPU</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol08-media_vdbox.pdf">Volume 8: Media VDBOX</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol09-media_vebox.pdf">Volume 9: Media VEBOX</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol10-hevc.pdf">Volume 10: HEVC</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol11-blitter.pdf">Volume 11: Blitter</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol12-display.pdf">Volume 12: Display</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol13-mmio.pdf">Volume 13: MMIO</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol14-observability.pdf">Volume 14: Observability</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol15-sfc.pdf">Volume 15: SFC</a></li>
      <li><a href="gen9.0-skl/intel-gfx-prm-osrc-skl-vol16-workarounds_0.pdf">Volume 16: Workarounds</a></li>
    </ul>
    <h3>Gen8: Cherryview/Brasswell</h3>
    <ul>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol01-preface.pdf">Volume 1:&nbsp;Preface</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol2a-commandreference-instructions.pdf">Volume 2a: Command Reference-Instructions</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol2b-commandreference-enumerations.pdf">Volume 2b: Command Reference-Enumerations</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol2c-commandreference-registers.pdf">Volume 2c: Command Reference-Registers</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol2d-commandreference-structures.pdf">Volume 2d: Command Reference-Structures</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol2e-commandreference-additionalinformation.pdf">Volume 2e: Command Reference-Aditional Information</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol03-gpu-overview.pdf">Volume 3: GPU Overview</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol04-configurations.pdf">Volume 4: Configurations</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol05-memory-views.pdf">Volume 5: Memory Views</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol06-command-stream-programming.pdf">Volume 6: Command Stream Programming</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol07-3d-media-gpgpu-engine.pdf">Volume 7: 3D-Media-GPGPU</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol08-media-vdbox.pdf">Volume&nbsp;8: Media VDBOX</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol09-media-vebox.pdf">Volume 9: Media VEBOX</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol10-hevc_0.pdf">Volume 10: HEVC</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol11-blitter_0.pdf">Volume 11: Blitter</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol12-display_0.pdf">Volume 12: Display</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol13-mmio_0.pdf">Volume 13: MMIO</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol14-observability_perf_counters_0.pdf">Volume 14: Observability</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol15-graphics-pci-registers_0.pdf">Volume 15: Graphics PCI Registers</a></li>
      <li><a href="gen8.0-chv-bsw/intel-gfx-bspec-osrc-chv-bsw-vol16-workarounds_0.pdf">Volume 16: Workarounds</a></li>
    </ul>
    <h3>Gen8: Broadwell</h3>
    <ul>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol01-preface_2.pdf">Volume 1:&nbsp;Preface</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol02a-commandreference-instructions_0.pdf">Volume 2a: Command Reference-Instructions</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol02b-commandreference-enumerations_0.pdf">Volume 2b: Command Reference-Enumerations</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol02c-commandreference-registers_2.pdf">Volume 2c: Command Reference-Registers</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol02d-commandreference-structures_1.pdf">Volume 2d: Command Reference-Structures</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol03-gpu_overview_1.pdf">Volume 3: GPU Overview</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol04-configurations_1.pdf">Volume 4: Configurations</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol05-memory_views_1.pdf">Volume 5: Memory Views</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol06-command_stream_programming_1.pdf">Volume 6: Command Stream Programming</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol07-3d_media_gpgpu_1.pdf">Volume 7: 3D-Media-GPGPU</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol08-media_vdbox_1.pdf">Volume 8: Media VDBOX</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol10-blitter_1.pdf">Volume 10: Blitter</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol11-display_1.pdf">Volume 11: Display</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol12-pcie_config_registers_1.pdf">Volume 12: PCIE Configuration Registers</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol13-mmio_1.pdf">Volume 13: MMIO</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol14-observability_0.pdf">Volume 14: Observability</a></li>
      <li><a href="gen8.0-bdw/intel-gfx-prm-osrc-bdw-vol15-workarounds_0.pdf">Volume 15: Workarounds</a></li>
    </ul>
    <h3>Gen7.5: Haswell</h3>
    <ul>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-preface.pdf#overlay-context=documentation/driver-documentation-prms">Volume 1 Preface and Introduction</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-commandreference-enumerations.pdf">Volume 2a Command Reference - Enumerations</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-commandreference-instructions_0.pdf">Volume 2b Command Reference - Instructions (Command Opcodes)</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-commandreference-registers_0.pdf">Volume 2c Command Reference - Registers</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-commandreference-structures.pdf">Volume 2d Command Reference - Structures</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-gpu-overview_0.pdf">Volume 3 GPU Overview</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-configurations.pdf">Volume 4 Configurations</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-memory-views.pdf">Volume 5 Memory Views</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-command-stream-programming_1.pdf">Volume 6: Command Stream Programming</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-3d-media-gpgpu-engine_0.pdf">Volume 7: 3D Media GPGU</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-media-vdbox.pdf">Volume 8 Media VDBOX</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-media-vebox.pdf">Volume 9 Media VEBOX</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-blitter.pdf">Volume 10 Blitter</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-display.pdf">Volume 11a Display</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-displaywatermark_guide.pdf">Volume 11b Display Watermark Guide</a></li>
      <li><a href="gen7.5-hsw/intel-gfx-prm-osrc-hsw-pcie-config-registers.pdf">Volume 12 PCIE Configuration Registers</a></li>
      <li><a href="gen7.5-hsw/observability_performance_counters_haswell.pdf">Observability Performance Counters</a></li>
    </ul>
    <h3>Gen7: Bay Trail</h3>
    <ul>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol1_-_introduction.pdf">Volume 1: Introduction</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol2_-_cmd_ref_enumerations.pdf">Volume 2, Part 1: Command Reference-Enumerations</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol2_-_cmd_ref_instructions.pdf">Volume 2, Part 2: Command Reference-Instructions</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol2_-_cmd_ref_registers.pdf">Volume 2, Part 3: Command Reference-Registers</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol2_-_cmd_ref_structures.pdf">Volume 2, Part 4: Command Reference-Structures</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol3_-_gpu_overview_1.pdf">Volume 3: GPU Overview</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol4_-_configurations.pdf">Volume 4: Configurations</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol5_-_memory_views.pdf">Volume 5: Memory Views</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol6_-_command_stream_programming.pdf">Volume 6: Command Stream Programming</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol7_-_3d-media-gpgpu.pdf">Volume 7: 3D-Media-GPGGU</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol8_-_media_vdbox.pdf">Volume 8: Media VDBOX</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol9_-_blitter.pdf">Volume 9: Blitter</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol10_-_display.pdf">Volume 10: Display</a></li>
      <li><a href="gen7.0-byt/intel_os_gfx_prm_vol11_-_gfx_interface.pdf">Volume 11: Graphics Interface</a></li>
    </ul>
    <h3>Gen7: Ivy Bridge</h3>
    <ul>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol1_part1.pdf">Volume 1 Part 1: Graphics Core</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol1_part2.pdf">Volume 1 Part 2: Graphics Core - MMIO, Media Registers &amp; Programming Environment</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol1_part3.pdf">Volume 1 Part 3: Graphics Core - Memory Interface and Commands for the Render Engine</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol1_part4.pdf">Volume 1 Part 4: Graphics Core - Blitter Engine</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol1_part5.pdf">Volume 1 Part 5: Graphics Core - Video Codec Engine Command Streamer</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol1_part6.pdf">Volume 1 Part 6: GT Interface Register</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol1_part7.pdf">Volume 1 Part 7: L3$/URB</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol2_part1.pdf">Volume 2 Part 1: 3D/Media - 3D Pipeline</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol2_part2.pdf">Volume 2 Part 2: Media and General Purpose Pipeline</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol2_part3.pdf">Volume 2 Part 3: Multi-Format Transcoder - MFX</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol3_part1.pdf">Volume 3 Part 1: VGA and Extended VGA Registers</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol3_part2.pdf">Volume 3 Part 2: PCI Registers</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol3_part3.pdf">Volume 3 Part 3: North Display Engine</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol3_part4.pdf">Volume 3 Part 4: South Display Engine</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol4_part1.pdf">Volume 4 Part 1: Subsystem and Cores - Shared Functions</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol4_part2.pdf">Volume 4 Part 2: Subsystem and Cores - Message Gateway, URB, Video Motion Estimation, Pixel Interpolator</a></li>
      <li><a href="gen7.0-ivb/ivb_ihd_os_vol4_part3.pdf">Volume 4 Part 3: Execution Unit ISA</a></li>
    </ul>
    <h3> Gen6: Sandy Bridge</h3>
    <ul>
      <li><a href="gen6.0-snb/snb_ihd_os_vol1_part1.pdf">Volume 1 Part 1: Graphics Core</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol1_part2.pdf">Volume 1 Part 2: Graphics Core - MMIO, Media Registers &amp; Programming Environment</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol1_part3.pdf">Volume 1 Part 3: Graphics Core - Memory Interface and Commands for the Render Engine</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol1_part4.pdf">Volume 1 Part 4: Graphics Core - Video Codec Engine</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol1_part5.pdf">Volume 1 Part 5: Graphics Core - Blitter Engine</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol2_part1.pdf">Volume 2 Part 1: 3D/Media - 3D Pipeline</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol2_part2.pdf">Volume 2 Part 2: 3D/Media - Media</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol3_part1.pdf">Volume 3 Part 1: Display Registers - VGA Registers</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol3_part2.pdf">Volume 3 Part 2: Display Registers - CPU Registers</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol3_part3.pdf">Volume 3 Part 3: PCH Display Registers</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol4_part1.pdf">Volume 4 Part 1: Subsystem and Cores - Shared Functions</a></li>
      <li><a href="gen6.0-snb/snb_ihd_os_vol4_part2.pdf">Volume 4 Part 2: Subsystem and Cores - Message Gateway, URB, Video Motion, and IS</a></li>
    </ul>
    <h3>Gen5: Iron Lake</h3>
    <ul>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol1_part1r2.pdf">Volume 1 Part 1: Graphics Core</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol1_part2r2.pdf">Volume 1 Part 2: Graphics Core - MMIO, Media Registers &amp; Programming Environment</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol1_part3r2.pdf">Volume 1 Part 3: Graphics Core - Memory Interface and Commands Render Engine</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol1_part4r2.pdf">Volume 1 Part 4: Graphics Core - Video Codec Engine</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol1_part5r2.pdf">Volume 1 Part 5: Graphics Core - Blitter Engine</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol2_part1r2.pdf">Volume 2 Part 1: 3D/Media - 3D Pipeline</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol2_part2r2.pdf">Volume 2 Part 2: 3D/Media - Media</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol3_part1r2.pdf">Volume 3 Part 1: Display Registers - VGA Registers</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol3_part2r2.pdf">Volume 3 Part 2: Display Registers - CPU Registers</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol3_part3r2.pdf">Volume 3 Part 3: PCH Display Registers</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol4_part1r2.pdf">Volume 4 Part 1: Subsystem and Cores - Shared Functions</a></li>
      <li><a href="gen5.0-ilk/ilk_ihd_os_vol4_part2_july_28_10.pdf">Volume 4 Part 2: Subsystem and Cores - Message Gateway, URB, Video Motion, and IS</a></li>
    </ul>
    <h3>Gen4: G45</h3>
    <ul>
      <li><a href="gen4.5-g45/g45_vol_1a_core_updated.pdf">G45: Volume 1a Graphics Core</a></li>
      <li><a href="gen4.5-g45/g45_vol_2_3dmedia.pdf">G45: Volume Two: 3D/Media</a></li>
      <li><a href="gen4.5-g45/g45_vol_3_register_0_0.pdf">G45: Volume Three: Display Register</a></li>
      <li><a href="gen4.5-g45/g45_vol_4_subsystem.pdf">G45: Volume Four: Subsystem and Cores</a></li>
    </ul>
    <h3>Gen4: G35</h3>
    <ul>
      <li><a href="gen4.0-g35/965_g35_vol_1_graphics_core_0.pdf">Volume One: Graphics Core</a></li>
      <li><a href="gen4.0-g35/965_g35_vol_2_3d_media_web_updated.pdf">Volume Two: 3D/Media</a></li>
      <li><a href="gen4.0-g35/965_g35_vol_3_display_registers_updated.pdf">Volume Three: Display Registers</a></li>
      <li><a href="gen4.0-g35/965_g35_vol_4_subsystem_core.pdf">Volume Four: Subsystem and Cores</a></li>
    </ul>
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