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authorChad Versace <chad@kiwitree.net>2020-04-21 14:05:00 -0700
committerChad Versace <chad@kiwitree.net>2020-04-21 14:05:00 -0700
commit4cedd2554ac1661e7db2ce4e40d74b1002863112 (patch)
treeab46faa53c8bc5d8b1f10f1bed22b36e60462fa8
parent8dd390b3cc40e39fe6db958582d4ceb6fea4ddee (diff)
downloadintel-gfx-docs-4cedd2554ac1661e7db2ce4e40d74b1002863112.zip
intel-gfx-docs-4cedd2554ac1661e7db2ce4e40d74b1002863112.tar.xz
Delete out-of-date copy of Intel's webpage
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-<li class="leaf menu-mlid-5235"><a href="/linuxgraphics/documentation/driver-documentation-prms/intel%C2%AE-g45-express-chipset">Intel® G45 Express Chipset</a></li>
-<li class="last leaf menu-mlid-5236"><a href="/linuxgraphics/documentation/driver-documentation-prms/intel%C2%AE-965-express-chipset-family-and-intel%C2%AE-g35-express">Intel® 965 Express Chipset Family and Intel® G35 Express Chipset Graphics Controller PRM</a></li>
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-<li class="last leaf menu-mlid-6821"><a href="https://01.org/linuxgraphics/gfx-docs/maintainer-tools/drm-intel.html">Linux DRM/i915 Maintainer&#039;s Guide</a></li>
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-<li class="leaf menu-mlid-7936"><a href="/linuxgraphics/documentation/bugs-and-debugging/tips-may-help-solve-your-issue-less-time">Tips that may help to solve your issue in less time</a></li>
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-<li class="last leaf menu-mlid-5227"><a href="/linuxgraphics/documentation/using-intel-reg-dumper">Using intel-reg-dumper</a></li>
-</ul></li>
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-<li class="leaf menu-mlid-5239"><a href="/linuxgraphics/documentation/how-set-dual-head-intel-graphics-randr-1.2">How to Set up Dual Head for Intel Graphics with RandR 1.2</a></li>
-<li class="last leaf menu-mlid-8853"><a href="https://01.org/linuxgraphics/https/01.org/linuxgraphics/forum/graphics-installer-discussions">Intel® Graphics Installer 1.4.0 for Linux*: Issue with signatures has been fixed</a></li>
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- <div class="field field-name-field-documentation-body field-type-text-with-summary field-label-hidden"><div class="field-items"><div class="field-item even"><p>The <strong>Programmer's Reference Manuals (PRM)</strong> describe the architectural behavior and programming environment of the chipset and graphics devices. The Graphics Controller (GC) contains an extensive set of registers and instructions for configuration, 2D, 3D, and video systems. The PRM describes the register, instruction, and memory interfaces and the device behaviors, as controlled and observed through those interfaces. The PRM also describes the registers and instructions and provides detailed bit/field descriptions. This information is critical to the development and maintenance of Intel graphics drivers for this hardware.</p>
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-<h2>Intel® Open Source HD Graphics Programmer's Reference Manual (PRM) For the 2016 Intel Atom™ Processors, Celeron™ Processors, and Pentium™ Processors based on the Apollo Lake Platform (Broxton Graphics)</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol01-preface.pdf" rel="nofollow">Volume 1: Preface</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol02a-commandreference-instructions.pdf" rel="nofollow">Volume 2a: Command Reference: Instructions (Command Opcodes)</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol02b-commandreference-registers.pdf" rel="nofollow">Volume 2b: Command Reference: Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol02c-commandreference-structures.pdf" rel="nofollow">Volume 2c: Command Reference: Structures</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol03-configurations.pdf" rel="nofollow">Volume 3: Configurations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol04-memory_views.pdf" rel="nofollow">Volume 4: Memory Views</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol05-command_stream_programming.pdf" rel="nofollow">Volume 5: Command Stream Programming</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol06-3d_media_gpgpu.pdf" rel="nofollow">Volume 6: 3D-Media-GPGPU</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol07-display.pdf" rel="nofollow">Volume 7: Display</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol08-workarounds.pdf" rel="nofollow">Volume 8: Workarounds</a></li>
-</ul><h2>INTEL® OPEN SOURCE HD GRAPHICS, INTEL IRIS™ GRAPHICS, and INTEL IRIS™ PRO GRAPHICS PROGRAMMER'S REFERENCE MANUAL (PRM) FOR THE 2015-2016 INTEL CORE™ PROCESSORS, CELERON™ PROCESSORS AND PENTIUM™ PROCESSORS BASED ON THE "skylake" PLATFORM</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol01-preface.pdf" rel="nofollow">Volume 1: Preface</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions.pdf" rel="nofollow">Volume 2a: Command Reference-Instructions (Command Opcodes)</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf" rel="nofollow">Volume 2a: Command Reference-Instructions (HuC)</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02b-commandreference-enumerations.pdf" rel="nofollow">Volume 2b: Command Reference-Enumerations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part1.pdf" rel="nofollow">Volume 2c: Command Reference-Registers Part 1 - Registers A through L</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02c-commandreference-registers-part2.pdf" rel="nofollow">Volume 2c: Command Reference-Registers Part 2 - Registers M through Z</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02d-commandreference-structures.pdf" rel="nofollow">Volume 2d: Command Reference-Structures</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol03-gpu_overview.pdf" rel="nofollow">Volume 3: GPU Overview</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol04-configurations.pdf" rel="nofollow">Volume 4: Configurations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol05-memory_views.pdf" rel="nofollow">Volume 5: Memory Views</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol06-command_stream_programming.pdf" rel="nofollow">Volume 6: Command Stream Programming</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol07-3d_media_gpgpu.pdf" rel="nofollow">Volume 7: 3D-Media-GPGPU</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol08-media_vdbox.pdf" rel="nofollow">Volume 8: Media VDBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol09-media_vebox.pdf" rel="nofollow">Volume 9: Media VEBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol10-hevc.pdf" rel="nofollow">Volume 10: HEVC</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol11-blitter.pdf" rel="nofollow">Volume 11: Blitter</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol12-display.pdf" rel="nofollow">Volume 12: Display</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol13-mmio.pdf" rel="nofollow"><span>Volume 13: MMIO</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol14-observability.pdf" rel="nofollow"><span>Volume 14: Observability</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol15-sfc.pdf" rel="nofollow"><span>Volume 15: SFC</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol16-workarounds_0.pdf" rel="nofollow"><span>Volume 16: Workarounds</span></a></li>
-</ul><h2>Intel® Open Source Graphics Programmer’s Reference Manual (PRM) for the 2014-2015 Intel Atom™ Processors, Celeron™ Processors, and Pentium™ Processors based on the Cherry Trail/Braswell platform (Cherryview/Braswell graphics)</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol01-preface.pdf" rel="nofollow">Volume 1: Preface</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol2a-commandreference-instructions.pdf" rel="nofollow">Volume 2a: Command Reference-Instructions</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol2b-commandreference-enumerations.pdf" rel="nofollow">Volume 2b: Command Reference-Enumerations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol2c-commandreference-registers.pdf" rel="nofollow">Volume 2c: Command Reference-Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol2d-commandreference-structures.pdf" rel="nofollow">Volume 2d: Command Reference-Structures</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol2e-commandreference-additionalinformation.pdf" rel="nofollow">Volume 2e: Command Reference-Aditional Information</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol03-gpu-overview.pdf" rel="nofollow">Volume 3: GPU Overview</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol04-configurations.pdf" rel="nofollow">Volume 4: Configurations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol05-memory-views.pdf" rel="nofollow">Volume 5: Memory Views</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol06-command-stream-programming.pdf" rel="nofollow">Volume 6: Command Stream Programming</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol07-3d-media-gpgpu-engine.pdf" rel="nofollow">Volume 7: 3D-Media-GPGPU</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol08-media-vdbox.pdf" rel="nofollow">Volume 8: Media VDBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol09-media-vebox.pdf" rel="nofollow">Volume 9: Media VEBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol10-hevc_0.pdf" rel="nofollow">Volume 10: HEVC</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol11-blitter_0.pdf" rel="nofollow">Volume 11: Blitter</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol12-display_0.pdf" rel="nofollow">Volume 12: Display</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol13-mmio_0.pdf" rel="nofollow"><span>Volume 13: MMIO</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol14-observability_perf_counters_0.pdf" rel="nofollow"><span>Volume 14: Observability</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol15-graphics-pci-registers_0.pdf" rel="nofollow"><span>Volume 15: Graphics PCI Registers</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-bspec-osrc-chv-bsw-vol16-workarounds_0.pdf" rel="nofollow"><span>Volume 16: Workarounds</span></a></li>
-</ul><h2>Intel® Open Source HD Graphics and Intel Iris™ Graphics Programmer's Reference Manual (PRM) for the 2014-2015 Intel Core™ Processors, Celeron™ Processors and Pentium™ Processors based on the "Broadwell" Platform</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol01-preface_4.pdf" rel="nofollow">Volume 1: Preface</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol02a-commandreference-instructions_2.pdf" rel="nofollow">Volume 2a: Command Reference-Instructions</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol02b-commandreference-enumerations_2.pdf" rel="nofollow">Volume 2b: Command Reference-Enumerations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol02c-commandreference-registers_4.pdf" rel="nofollow">Volume 2c: Command Reference-Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol02d-commandreference-structures_3.pdf" rel="nofollow">Volume 2d: Command Reference-Structures</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol03-gpu_overview_3.pdf" rel="nofollow">Volume 3: GPU Overview</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol04-configurations_3.pdf" rel="nofollow">Volume 4: Configurations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol05-memory_views_3.pdf" rel="nofollow">Volume 5: Memory Views</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol06-command_stream_programming_3.pdf" rel="nofollow">Volume 6: Command Stream Programming</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol07-3d_media_gpgpu_3.pdf" rel="nofollow">Volume 7: 3D-Media-GPGPU</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol08-media_vdbox_3.pdf" rel="nofollow">Volume 8: Media VDBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol09-media_vebox_5.pdf" rel="nofollow">Volume 9: Media VEBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol10-blitter_3.pdf" rel="nofollow">Volume 10: Blitter</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol11-display_3.pdf" rel="nofollow">Volume 11: Display</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol12-pcie_config_registers_3.pdf" rel="nofollow">Volume 12: PCIE Configuration Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol13-mmio_3.pdf" rel="nofollow"><span>Volume 13: MMIO</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol14-observability_2.pdf" rel="nofollow"><span>Volume 14: Observability</span></a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bdw-vol15-workarounds_2.pdf" rel="nofollow"><span>Volume 15: Workarounds</span></a></li>
-</ul><h2><span>Intel Open Source Graphics Programmer’s Reference Manual (PRM) for the 2014 Intel® Atom™ Processors, Celeron™ Processors, and Pentium™ Processors based on the Bay Trail platform (Valleyview graphics)</span></h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol1_-_introduction.pdf" rel="nofollow">Volume 1: Introduction</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol2_-_cmd_ref_enumerations.pdf" rel="nofollow">Volume 2, Part 1: Command Reference-Enumerations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol2_-_cmd_ref_instructions.pdf" rel="nofollow">Volume 2, Part 2: Command Reference-Instructions</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol2_-_cmd_ref_registers.pdf" rel="nofollow">Volume 2, Part 3: Command Reference-Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol2_-_cmd_ref_structures.pdf" rel="nofollow">Volume 2, Part 4: Command Reference-Structures</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol3_-_gpu_overview_1.pdf" rel="nofollow">Volume 3: GPU Overview</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol4_-_configurations.pdf" rel="nofollow">Volume 4: Configurations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol5_-_memory_views.pdf" rel="nofollow">Volume 5: Memory Views</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol6_-_command_stream_programming.pdf" rel="nofollow">Volume 6: Command Stream Programming</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol7_-_3d-media-gpgpu.pdf" rel="nofollow">Volume 7: 3D-Media-GPGGU</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol8_-_media_vdbox.pdf" rel="nofollow">Volume 8: Media VDBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol9_-_blitter.pdf" rel="nofollow">Volume 9: Blitter</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol10_-_display.pdf" rel="nofollow">Volume 10: Display</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel_os_gfx_prm_vol11_-_gfx_interface.pdf" rel="nofollow">Volume 11: Graphics Interface</a></li>
-</ul><h2>Intel® Open Source HD Graphics Programmer's Reference Manual (PRM) for <strong>2013</strong> Intel Core Processor Family based on Haswell platform, including Intel HD Graphics, Intel Iris™ Graphics, and Intel Iris Pro Graphics</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-preface.pdf#overlay-context=documentation/driver-documentation-prms" rel="nofollow">Volume 1 Preface and Introduction</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-commandreference-enumerations.pdf" rel="nofollow">Volume 2a Command Reference - Enumerations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-commandreference-instructions_0.pdf" rel="nofollow">Volume 2b Command Reference - Instructions (Command Opcodes)</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-commandreference-registers_0.pdf" rel="nofollow">Volume 2c Command Reference - Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-commandreference-structures.pdf" rel="nofollow">Volume 2d Command Reference - Structures</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-gpu-overview_0.pdf" rel="nofollow">Volume 3 GPU Overview</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-configurations.pdf" rel="nofollow">Volume 4 Configurations</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-memory-views.pdf" rel="nofollow">Volume 5 Memory Views</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-command-stream-programming_1.pdf" rel="nofollow">Volume 6: Command Stream Programming</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-3d-media-gpgpu-engine_0.pdf" rel="nofollow">Volume 7: 3D Media GPGU</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-media-vdbox.pdf" rel="nofollow">Volume 8 Media VDBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-media-vebox.pdf" rel="nofollow">Volume 9 Media VEBOX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-blitter.pdf" rel="nofollow">Volume 10 Blitter</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-display.pdf" rel="nofollow">Volume 11a Display</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-displaywatermark_guide.pdf" rel="nofollow">Volume 11b Display Watermark Guide</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-pcie-config-registers.pdf" rel="nofollow">Volume 12 PCIE Configuration Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/observability_performance_counters_haswell.pdf" rel="nofollow">Observability Performance Counters</a></li>
-</ul><h2>Intel® Open Source HD Graphics Programmer's Reference Manual (PRM) for <strong>2012</strong> Intel Core Processor Family</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol1_part1.pdf" rel="nofollow">Volume 1 Part 1: Graphics Core</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol1_part2.pdf" rel="nofollow">Volume 1 Part 2: Graphics Core - MMIO, Media Registers &amp; Programming Environment</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol1_part3.pdf" rel="nofollow">Volume 1 Part 3: Graphics Core - Memory Interface and Commands for the Render Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol1_part4.pdf" rel="nofollow">Volume 1 Part 4: Graphics Core - Blitter Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol1_part5.pdf" rel="nofollow">Volume 1 Part 5: Graphics Core - Video Codec Engine Command Streamer</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol1_part6.pdf" rel="nofollow">Volume 1 Part 6: GT Interface Register</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol1_part7.pdf" rel="nofollow">Volume 1 Part 7: L3$/URB</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol2_part1.pdf" rel="nofollow">Volume 2 Part 1: 3D/Media - 3D Pipeline</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol2_part2.pdf" rel="nofollow">Volume 2 Part 2: Media and General Purpose Pipeline</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol2_part3.pdf" rel="nofollow">Volume 2 Part 3: Multi-Format Transcoder - MFX</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol3_part1.pdf" rel="nofollow">Volume 3 Part 1: VGA and Extended VGA Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol3_part2.pdf" rel="nofollow">Volume 3 Part 2: PCI Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol3_part3.pdf" rel="nofollow">Volume 3 Part 3: North Display Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol3_part4.pdf" rel="nofollow">Volume 3 Part 4: South Display Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol4_part1.pdf" rel="nofollow">Volume 4 Part 1: Subsystem and Cores - Shared Functions</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol4_part2.pdf" rel="nofollow">Volume 4 Part 2: Subsystem and Cores - Message Gateway, URB, Video Motion Estimation, Pixel Interpolator</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ivb_ihd_os_vol4_part3.pdf" rel="nofollow">Volume 4 Part 3: Execution Unit ISA</a></li>
-</ul><h2>Intel® Open Source HD Graphics Programmer's Reference Manual (PRM) for <strong>2011</strong> Intel Core Processor Family</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol1_part1.pdf" rel="nofollow">Volume 1 Part 1: Graphics Core</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol1_part2.pdf" rel="nofollow">Volume 1 Part 2: Graphics Core - MMIO, Media Registers &amp; Programming Environment</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol1_part3.pdf" rel="nofollow">Volume 1 Part 3: Graphics Core - Memory Interface and Commands for the Render Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol1_part4.pdf" rel="nofollow">Volume 1 Part 4: Graphics Core - Video Codec Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol1_part5.pdf" rel="nofollow">Volume 1 Part 5: Graphics Core - Blitter Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol2_part1.pdf" rel="nofollow">Volume 2 Part 1: 3D/Media - 3D Pipeline</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol2_part2.pdf" rel="nofollow">Volume 2 Part 2: 3D/Media - Media</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part1.pdf" rel="nofollow">Volume 3 Part 1: Display Registers - VGA Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part2.pdf" rel="nofollow">Volume 3 Part 2: Display Registers - CPU Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part3.pdf" rel="nofollow">Volume 3 Part 3: PCH Display Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol3_part3b_register_offsets.pdf" rel="nofollow">Supplement to Volume 3 Part 3: PCH Display Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol4_part1.pdf" rel="nofollow">Volume 4 Part 1: Subsystem and Cores - Shared Functions</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/snb_ihd_os_vol4_part2.pdf" rel="nofollow">Volume 4 Part 2: Subsystem and Cores - Message Gateway, URB, Video Motion, and IS</a></li>
-</ul><h2>Intel® Open Source HD Graphics Programmer's Reference Manual (PRM) for <strong>2010</strong> Intel Core Processor Family</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol1_part1r2.pdf" rel="nofollow">Volume 1 Part 1: Graphics Core</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol1_part2r2.pdf" rel="nofollow">Volume 1 Part 2: Graphics Core - MMIO, Media Registers &amp; Programming Environment</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol1_part3r2.pdf" rel="nofollow">Volume 1 Part 3: Graphics Core - Memory Interface and Commands Render Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol1_part4r2.pdf" rel="nofollow">Volume 1 Part 4: Graphics Core - Video Codec Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol1_part5r2.pdf" rel="nofollow">Volume 1 Part 5: Graphics Core - Blitter Engine</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol2_part1r2.pdf" rel="nofollow">Volume 2 Part 1: 3D/Media - 3D Pipeline</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol2_part2r2.pdf" rel="nofollow">Volume 2 Part 2: 3D/Media - Media</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol3_part1r2.pdf" rel="nofollow">Volume 3 Part 1: Display Registers - VGA Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol3_part2r2.pdf" rel="nofollow">Volume 3 Part 2: Display Registers - CPU Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol3_part3r2.pdf" rel="nofollow">Volume 3 Part 3: PCH Display Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol4_part1r2.pdf" rel="nofollow">Volume 4 Part 1: Subsystem and Cores - Shared Functions</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/ilk_ihd_os_vol4_part2_july_28_10.pdf" rel="nofollow">Volume 4 Part 2: Subsystem and Cores - Message Gateway, URB, Video Motion, and IS</a></li>
-</ul><h2>Intel® G45 Express Chipset [Graphics and Memory Controller Hub-GMCH] Programmer's Reference Manual (PRM)</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/g45_vol_1a_core_updated.pdf" rel="nofollow">G45: Volume 1a Graphics Core</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/g45_vol_2_3dmedia.pdf" rel="nofollow">G45: Volume Two: 3D/Media</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/g45_vol_3_register_0_0.pdf" rel="nofollow">G45: Volume Three: Display Register</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/g45_vol_4_subsystem.pdf" rel="nofollow">G45: Volume Four: Subsystem and Cores</a></li>
-</ul><h2>Intel® 965 Express Chipset Family and Intel® G35 Express Chipset Graphics Controller PRM</h2>
-
-<ul><li><a href="https://01.org/sites/default/files/documentation/965_g35_vol_1_graphics_core_0.pdf" rel="nofollow">Volume One: Graphics Core</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/965_g35_vol_2_3d_media_web_updated.pdf" rel="nofollow">Volume Two: 3D/Media</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/965_g35_vol_3_display_registers_updated.pdf" rel="nofollow">Volume Three: Display Registers</a></li>
- <li><a href="https://01.org/sites/default/files/documentation/965_g35_vol_4_subsystem_core.pdf" rel="nofollow">Volume Four: Subsystem and Cores</a></li>
-</ul></div></div></div><div class="field field-name-field-file field-type-file field-label-hidden"><div class="field-items"><div class="field-item even"><table class="sticky-enabled">
- <thead><tr><th>Attachment</th><th>Size</th> </tr></thead>
-<tbody>
- <tr class="odd"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol02c-commandreference-structures.pdf" type="application/pdf; length=2574622" title="intel-gfx-prm-osrc-bxt-vol02c-commandreference-structures.pdf">Volume 2c: Command Reference: Structures</a></span></td><td>2.46 MB</td> </tr>
- <tr class="even"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol03-configurations.pdf" type="application/pdf; length=574961" title="intel-gfx-prm-osrc-bxt-vol03-configurations.pdf">Volume 3: Configurations</a></span></td><td>561.49 KB</td> </tr>
- <tr class="odd"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol04-memory_views.pdf" type="application/pdf; length=738456" title="intel-gfx-prm-osrc-bxt-vol04-memory_views.pdf">Volume 4: Memory Views</a></span></td><td>721.15 KB</td> </tr>
- <tr class="even"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol05-command_stream_programming.pdf" type="application/pdf; length=445697" title="intel-gfx-prm-osrc-bxt-vol05-command_stream_programming.pdf">Volume 5: Command Stream Programming</a></span></td><td>435.25 KB</td> </tr>
- <tr class="odd"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol06-3d_media_gpgpu.pdf" type="application/pdf; length=1257823" title="intel-gfx-prm-osrc-bxt-vol06-3d_media_gpgpu.pdf">Volume 6: 3D-Media-GPGPU</a></span></td><td>1.2 MB</td> </tr>
- <tr class="even"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol07-display.pdf" type="application/pdf; length=2029319" title="intel-gfx-prm-osrc-bxt-vol07-display.pdf">Volume 7: Display</a></span></td><td>1.94 MB</td> </tr>
- <tr class="odd"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol08-workarounds.pdf" type="application/pdf; length=489725" title="intel-gfx-prm-osrc-bxt-vol08-workarounds.pdf">Volume 8: Workarounds</a></span></td><td>478.25 KB</td> </tr>
- <tr class="even"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol02a-commandreference-instructions.pdf" type="application/pdf; length=5986178" title="intel-gfx-prm-osrc-bxt-vol02a-commandreference-instructions.pdf">Volume 2a: Command Reference: Instructions (Command Opcodes)</a></span></td><td>5.71 MB</td> </tr>
- <tr class="odd"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol02b-commandreference-registers.pdf" type="application/pdf; length=17755136" title="intel-gfx-prm-osrc-bxt-vol02b-commandreference-registers.pdf">Volume 2b: Command Reference: Registers</a></span></td><td>16.93 MB</td> </tr>
- <tr class="even"><td><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/modules/file/icons/application-pdf.png" /> <a href="https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-bxt-vol01-preface.pdf" type="application/pdf; length=1368358" title="intel-gfx-prm-osrc-bxt-vol01-preface.pdf">Volume 1: Preface</a></span></td><td>1.3 MB</td> </tr>
-</tbody>
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